RAM

Bits & Bytes of memory

BEDO DRAM Short for Burst EDO DRAM, a new type of EDO DRAM that can process four memory addresses in one burst. Unlike SDRAM, however, BEDO DRAM can only stay synchronized with the CPU clock speed  for short periods (bursts). Also, it can't keep up with processors whose buses run faster than 66 MHz.

DRAM Pronounced dee-ram, DRAM stands for dynamic random access memory, a type of memory used in most personal computers. EDO DRAM Short for Extended Data Output Dynamic Random Access Memory, a type of DRAM that is faster than conventional DRAM. Unlike conventional DRAM which can only access one block of data at a time, EDO RAM can start fetching the next block of memory at the same time that it sends the previous block to the CPU.

FPM RAM Short for Fast Page Mode RAM, a type of Dynamic RAM (DRAM) that allows faster access to data in the same row or page. Page-mode memory works by eliminating the need for a row address if data is located in the row previously accessed. It is sometimes called page mode memory.  FPM RAM is being replaced by newer types of memory, such as SDRAM.

RDRAM Short for Rambus DRAM, developed by Rambus, Inc. Whereas the fastest current memory technologies used by PCs (SDRAM) can deliver data at a maximum speed of about 100 MHz, RDRAM transfers data at up to 600 MHz.  In 1997, Intel  announced that it would license the Rambus technology for use on its future motherboard, thus making it the likely defacto standard for memory architectures.  However, a consortium of computer vendors is working on an alternative memory architecture called SyncLink DRAM (SLDRAM).  RDRAM is already being used in place of VRAM in some graphics accelerator boards, but it is not expected to be used for the main memory of PCs until 1998 or 1999.  Intel and Rambus are also working a new version of RDRAM, called nDRAM, that will support data transfer speeds at up to 1,600 MHz.

SDRAM Short for Synchronous DRAM, a new type of DRAM  that can run at much higher clock speeds than conventional memory. SDRAM actually synchronizes itself with the CPU's bus and is capable of running at 133 MHz, about three times faster than conventional FPM RAM, and about twice as fast EDO DRAM and BEDO DRAM. SDRAM is replacing EDO DRAM in many newer computers.  Today's fastest systems use CPU buses running at 100 MHz, so SDRAM can keep up with them, though barely.  Future PCs, however, are expected to have CPU buses running at 200 MHz or faster. SDRAM is not expected to support these high speeds which is why new memory technologies, such as RDRAM and SLDRAM, are being developed.

SLDRAM Short for SyncLink DRAM, a new type of memory being developed by a consortium of computer manufacturers called the SyncLink Consortium. SLDRAM is competing with Rambus memory (RDRAM) as the future PC memory architecture. But whereas actual RDRAM chips are already in use on video boards and other devices, SLDRAM is still on paper only. Moreover, Intel is backing RDRAM, which reduces the odds of SLDRAM becoming an important technology.

pipeline burst cache A type of memory cache built into many modern DRAM controller and chipset designs. Pipeline burst caches use two techniques - a burst mode that pre-fetches memory contents before they are requested, and pipelining so that one memory value can be accessed in the cache at the same time that another memory value is accessed in DRAM. The purpose of pipeline burst caches is to minimize wait states so that memory can be accessed as fast a possible by the microprocessor.  The term is often abbreviated is PBC.

pipelining (1) A technique used in advanced microprocessors where the microprocessor begins executing a second instruction before the first has been completed. That is, several instructions are in the pipeline simultaneously, each at a different processing stage.

The pipeline is divided into segments and each segment can execute its operation concurrently with the other segments. When a segment completes an operation, it passes the result to the next segment in the pipeline and fetches the next operation from the preceding segment. The final results of each instruction emerge at the end of the pipeline in rapid succession. Although formerly a feature only of high-performance and RISC-based microprocessors, pipelining is now common in microprocessors used in personal computers. Intel's Pentium chip, for example, uses pipelining to execute as many as six instructions simultaneously. Pipelining is called pipeline processing.

(2) A similar technique used in DRAM, in which the memory loads the requested memory contents into a small cache composed of SRAM and then immediately begins fetching the next memory contents. This creates a two-stage pipeline, where data is read from or written to SRAM in one stage, and data is read from or written to memory in the other stage.

DRAM pipelining is usually combined with another performance technique called burst mode. The two techniques together are called a pipeline burst cache.

wait state A time-out period during which a CPU or bus  lies idle. Wait states are sometimes required because different components function at different clock speeds. For example, if the CPU is much faster than the memory chip, it may need to sit idle during some clock cycles so that the memory chips can catch up.  Likewise, buses sometimes require wait states if expansion boards run slower than the bus.

A zero wait state system is one in which the microprocessor runs at the maximum speed without any time-outs to compensate for slow memory. Wait states can be avoided by using a variety of techniques, including page-mode memory, interleaved memory, a burst mode, and memory caches.

burst mode A data transmission mode in which data is sent faster than normal. There are a number of techniques for implementing burst modes. In a data bus, for example, a burst mode is usually implemented by allowing a device to seize control of the bus and not permitting other devices to interrupt. In RAM, burst modes are implemented by automatically fetching the next memory contents before they are requested. This is essentially the same technique used by disk caches.

The one characteristic that all burst modes have in common is that they are temporary and unsustainable. They allow faster data transfer rates than normal, but only for a limited period of time and only under special conditions.